TM0104 coprocessor

The TM0104 is a dynamically reconfigurable co-processor that increases the performance. It was designed to be used with GPPs (processors for general purpose) aiming to achieve similar or superior performance to DSPs (digital signal processors,). Using benchmarks, as DSPstone, this co-processor achieved superior results to known DSPs, and speed-ups 22 times superior to host processor.

As embedded software designers, if we ever face situations in which there is a need to increase performance because of a particular block of operations, we have three basic solutions: optimizing the code, transfering the code to another processor (or DSPs) or placing a co-processor to improve the performance we need. The problem is that, usually, co-processors or DSPs have a very good application for certain tasks and not enough for others, and the code optimization has limits.

The presented reconfigurable co-processor can be molded according to the software block that needs performance increase, this way we can have several functions implemented in hardware to provide a major speed-up in the general purpose processor.

Results

Tests have been carried out on both this co-processor and NIOS processor (Altera) and the obtained gains in performance were very satisfactory. Besides that, when compared to known DSPs, one can observe that the results were similar, if not better, in many cases.

Features:

• Possible uses of co-processors arrays for parallel processing;
• GPP's obtained superior results to commercial DSPs when subjected to testing;
• Some dsps (processors) are very good at specific tasks but not at others, the presented co-processor gatters the best of each DSP in a single GPP;
• Little use of the area;
• Tested in a StratixII with NIOS processor.