Enhanced Cache Controller & Decompressor Engine

ID0501 is the combination of a full cache of instructions and a decompression hardware in a single IP core.

In addition to all the services of a full cache, the decompression hardware leads to significant increases in performance, energy saving and reduction in the memory area for system while providing the usual interface of a regular cache, resulting in a transparent and intuitive integration to its SOC (the embedded processor acts as if you were working with a regular cache ).
The decompressor was developed as a quick access interface, so that the latency time of access is maintained, not causing any performance impact to the embedded microprocessor.

Benefits and features:

• Memory Reduction in over 30%;
• Performance increase exceeding 45%;
• Energy saving exceeding 35%;
• Different configurations for cache:
  • directly mapped, 1-set, 2-set, 4-set and 8-set;
  • Different policies: LRR, LRU etc;
  • Differentiated line sizes (16-32 bytes);
  • Regular cache interface;
  • Decompression internally performed in the cache (without output impact ).

Support:

• Binaries compressed by the application;
• ID0501 pre-synthesized netlist;
• Documentation and manuals;
• Support for integration